Due to many advantages comparing to conventional linear power, such as higher efficiency, lower stand-by power, lower cost, and smaller size and so on, switching mode power supply (SMPS) is increasingly extending to various electronic devices.
FIG. 1 illustrates a basic principle diagram for a current mode SMPS system which is the most widely used power supply in current time. The system comprising: a switching power converter 100, a switching power controller 120, and a feedback network 140. The switching power converter 100 includes a power input port 102 and a power output port 104. The switching power converter and the switching power controller interact by switching control signal and current control signal. The feedback signal is fed into the switching power controller 120 from feedback network 140. Function of the system is: converting the AC or DC power input from the port 102 into DC or AC power that meet specially defined specifications and outputting from the port 104.
In FIG. 1, switching power converter generally comprising: magnetic energy storage component (for example transformer or inductor), power switching device (for example power MOSFET or power BJT), power diodes and filter capacitors. Controlled by switching control signal, power switching device is periodically turned on or turned off. Wherein switching control signal usually is pulse width modulation (PWM) or pulse frequency modulation (PFM) signal, it also may be a combination of PWM and PFM. Pulse width of switching control signal defines the “on” time of power switch in a period, and combines with switching frequency to control power transformed from power input port to power output port, that is output power of the SMPS system. In the context of this patent application, the switch control signal is referred as PWM signal.
Taking AC-DC current mode SMPS as an example, in order to be capable of achieving constant output voltage level at different load condition, it is necessary to adjust switching frequency and (or) pulse width of the switching control signal in real-time, thus controlling output power of the SMPS system. As illustrated in FIG. 1, feedback network 140 samples the output power signal and generates feedback signal which is sent into the switching power controller 120. Meanwhile, the current control signal output from the switching power converter also flows into switching power controller 120. Jointly manipulated by the feedback signal and the current control signal, pulse width or (and) frequency of the switching control signal is modulated, thus obtaining output power matching with output load.
In order to more clearly describe operation principle of SMPS, a traditional flyback SMPS system diagram (including control IC diagram) is illustrated in FIG. 2. With reference to FIG. 2, the flyback SMPS system is widely used in various electronic devices in which electrical isolation between the power input stage and the power output stage is needed. As illustrated in FIG. 2, all nodes marked as “ground” are connected together electrically and act as the lowest reference potential of the power input stage. Similarly, all nodes named “VN” are connected together electrically, and act as the lowest reference potential of the power output stage. The so called electrical isolation is just the isolation between “ground” and “VN”. This specification mentioned above is applied to FIGS. 2, 4, 5. Such switching power system is applied at some fields as AC-DC or DC-DC adapters, chargers of portable electronic devices (for example mobile phones), LED drivers and so on. The SMPS system in FIG. 2 includes: a switching power converter 200, a switching power controller IC 220, a feedback network 240, an input EMI filter 260, an input rectifier 280, a start-up resistor R1, a Buck capacitor C1, a rectifying diode D1 for powering the controller IC, a decoupling capacitor C2 for power supply of the controller IC, a sensing resistor RS for sensing the current control signal and an output load RL.
Flyback switching power converter illustrated in dashed box of FIG. 2 comprising: an isolation transformer (TX), a power rectifying diode D2, a filter capacitor C3 and a power switch (SW). One end of primary winding (PRE) of the transformer connects to LINE input voltage, produced by an EMI filter 260 and a bridge-rectifier 280 operating on an AC input voltage; another end of primary winding of the transformer is connected to one end of a power switch SW. The other end of the power switch is connected to ground (GND) via a resistor RS. Rs acts as converting the current signal of the primary winding (PRE) into a voltage signal and send the voltage signal to switching power controller 220 as a current control signal. When power switch (SW) turns on, the LINE voltage is forced on the primary side of the transformer (TX) and energy is stored into primary side of the transformer (TX) when the current in primary winding linearly increases; when power switch (SW) turns off, the stored energy is transferred to secondary side of the transformer (TX), therefore the energy is passed to output load. Flyback switching power converter includes two operation modes: discontinue current mode (DCM) and continue current mode (CCM). Wherein DCM is: that the energy stored in primary winding during power switch turn-on will be completely transferred to load of the secondary winding during power switch turn-off; CCM is: that the energy stored in primary winding will be partly transferred to load of the secondary winding during power switch turning-off. For convenience, the following descriptions of the application will adopt DCM as examples, but it is easily to understand that the switching power converter described in the context of this patent application may also operate on CCM.
To ensure output voltage can still maintain constant under controlled conditions even if load RL is changed, it is necessary to sample output voltage in real time. The sampled output voltage generates a feedback signal (SFB) through a feedback network 240, and then SFB flows into switching power controller IC 220. By processing SFB and current control signal of the primary winding of transformer (TX), the switching power controller IC generates power switch control signal VGATE.
The switching power controller IC 220 illustrated in FIG. 2 contains 5 terminal pins: VDD, GND, FB, CS, and GATE. VDD (power supply) and GND (ground) are respectively connected to chip power supply and system ground generated by system to provide stable working power supply for chip. The pin of FB is connected to feedback network 240 to receive feedback signal SFB from feedback network 240, and the pin of CS is connected to resistor Rs to receive the current control signal VCS that is generated on resistor Rs by the primary winding (PRE) of the transformer. Pin GATE is connected to the controlling terminal of power switching (SW). Chip 220 consists of the following main blocks: a UVLO (under voltage lock out) circuit 221, a LDO (low dropout regulator) 222, testing controller 223, a clock generator 224, a PWM generator 225, a power switching driver 226, a reference circuit 227, a PWM comparator 228 and a feedback signal processor 229. The working fundamental of chip 220 is: the feedback signal SFB is processed by the feedback processor 229 to generate two signals of SFM and Vth. At the dynamic reference threshold of PWM comparator 228, Vth is compared with VCS introduced through pin CS, then the output signal Ccnt of PWM comparator 228 is sent to the PWM generator 225 to control the on/off of PWM signal; SFM is sent to clock generator 224 to control the frequency of clock, and then to control the frequency of PWM signal further.
The timing sequence of controller is illustrated in FIG. 3. The phase and the pulse width of the power switch control signal VGATE is essentially the same as that of the PWM_P. The difference between the power switch control signal VGATE and the PWM_P signal is the amplitude of pulse and driving capability. The generation procedure of power switching control signal VGATE described in FIG. 3 is as the following:
1. The falling edge of clock signal triggers PWM_P turning high, and PWM_N signal turning low, at this time point, the power switch begins to turn on.
2. Turn-on of power switching leads to the current in primary winding of the transformer increasing linearly, and VCS increasing linearly also.
3. When the amplitude of Vcs reaches that of PWM comparator threshold Vth, the PWM comparator outputs logical high, PWM_P becomes low and PWM_N signal becomes high, which leads to the power switch cut off.
4. Cut-off of the power switch leads to VCS signal returning to zero and PWM comparator outputs logical low.
FIG. 3 shows that PWM_P and PWM_N are a pair of compensative pulse signals, When PWM_P is high, power switching is on; while PWM_N is high, power switching is off.
There are two typical methods for feedback implementation employed by flyback switching power converter: one is secondary winding feedback of transformer (TX); the other is primary winding feedback of transformer. As for secondary winding feedback of transformer is concerned, the feedback network, the error amplifier and the compensation network all are at the secondary winding side of the transformer, the feedback signal is coupled to primary stage through electronic isolation device—opto-coupler (an optical-electronic coupler). A typical flyback SMPS system based on secondary winding feedback of transformer is shown in FIG. 4.
A typical flyback SMPS system based on primary winding feedback of transformer is shown in FIG. 5. In this system, feedback network consists of an auxiliary winding AUX of transformer and a pair of divider resistors R1 and R2. In the period from the power switch turning-off to power diode D2 of the secondary winding turning-off, output voltage is mapped to auxiliary wind. The divided auxiliary winding voltage is sent to FB pin of power controller chip as feedback signal.
For most of flyback SMPS system used to drive MOSFET power switch, voltage imposed on pin of VDD is set from 14 V to 20 V, the voltage of pin GATE is set from 12 V to 18 V, and the signal amplitudes of CS and FB are smaller than 5 V based on the consideration of system design. Therefore, in order to save cost (a high voltage device may consume a larger chip area) and to optimize performance (a low voltage device is easy to meet matching requirement, and the acquired gain is higher), inner circuits related to VDD and GATE are designed with high voltage device that can endure up to 50V power supply; meanwhile the circuits related to CS and FB is designed with low voltage device that can work at power supply from 9 to 14v. For this reason, VDD and GATE are called high-voltage pins; CS and FB are called low-voltage pins. This kind of pin setting brings some potential risk, for example, if high-voltage pins of VDD and GATE happen to be shorted with low-voltage pins of CB and FB, inner devices involved with low-voltage pins may be break-down and damaged. Especially, when VDD, connected with capacitor C2 (4 μF˜10 μF) with a large amount of stored energy, is shorted with CS and FB, electric charges stored in C2 are discharged rapidly through low-voltage pins, which possibly causes permanent damage to inner low-voltage circuits. In SMPS system, most failures are caused by the electric discharge as described in a situation due to above reason.
The other potential risk is the negative pulse between pins of CS and GND. At the moment of MOSFET power switch turn-off, most of negative charges in conducting channel of the switch are discharged into GND through resistor Rs, as a result, an instantaneous negative voltage spike is generated between pins of CS and GND. When this negative voltage spike is larger than the forward threshold voltage of PN junction, latch-up will happen possibly in the controller chip, causing the controller chip works abnormally or fails.